EC-228 Computer Architecture and Organization 4 (3+1)

BS Computer Engineering Program (Batch 2017)



Course Information

Semester 4th Semester - Spring 2019
Prerequisite EC-121 Digital Logic Design
Course Instructor/s Dr Hashim Ali - hashim.ali@hitecuni.edu.pk
Lab Engineer Engr. Shahbaz Khan - shahbaz.ce@hitecuni.edu.pk
Office Hours
  • Wednesday, 01:30 - 03:30
  • Friday, 02:30 - 03:30
  • Text Book/s

    Course Objective

    To introduce the internal working and organisation of various building blocks of a digital computer as well as simple assembly language programming techniques. Upon completion of this course, the student will have basic understanding of computer system architecture including CPU design, memory subsystem design and performance enhancement techniques.

    Course Contents

    Difference between architecture & organisation, design of computer systems and components, processor design, CPU architecture, functional blocks and development of instruction set, design of basic functional blocks PC,IR,CU,ALU etc.), instruction set design, and addressing, control structures and microprogramming, memory management, caches, and memory hierarchies, and interrupts and I/O structures, pipelining of processor Issues and hurdles, exception handling, parallelism, multiprocessor systems, Introduction to superscalar processors (CISC, RISC), cache memory, different designs of cache memory system, virtual memory system, address mapping using pages, pipelining and threading, instruction level parallelism (ILP), introduction to parallel processing, branch prediction, pre-fetching, multithreading.

    Course Learning Outcomes

    Grading Policy

    75% class attendance is mandatory to appear in the examination. Course grades will be determined by the following weights:

    Theory (62%) Laboratory (20%) Project (18%)
    Quizzes 12% Lab Reports 6% Assignments / Project 18%
    Sessional - I 15% Lab Performance 8% -- --
    Sessional - II 15% Viva Voce 6% -- --
    Final Exam 20% -- -- -- --
    Course Total (100%) Theory (62%) + Laboratory (20%) + Project (18%)

    NOTE:

    Schedule of Exams

    Download Course Outline


    Lectures Plan

    Advised to gather/read neccessary reading material before the class.

    Week# Date Topic Slide Download Readings Evaluation
    1- 11, 14/2/19 Course Overview, Digital Systems and Typical Architecture
    Digital Logic Design (Review)

    Digital Design of Fundamental Components
    Simple Arithmetic Unit (ADD, SUB)
    Simple Logical Unit (AND, OR etc.)
    Lecture 1 Ch 9, 10, 11 [Stallings] --
    2- 19, 21/2/2019 Digital Design of Fundamental Components
    Overflow, Carry, Zero Flags
    Comparison Circuit
    Multiplier Design (Unisgned, Signed), Booth's Algorithm
    Divider Design (Unsigend, Signed), Non-restoring & Restoring Algorithms
    Shift Operations (Logical, Arithmetic)
    Signed Binary Division Rules [pdf] Ch 10 [Stallings] Assignment-1 Deadline
    3- 26, 28/2/2019 Basic Concepts of Computer Architecture
    Difference between Organization and Architecture
    What is Computer Architecture?
    Overview of Instruction Set Architecture (ISA), Harvard Architecture, John von Neumann Architecture
    Structure and Function of Computer

    Top-Level View of Computer Function and Interconnection
    Computer Components (Hardware, Software)
    Lecture 2 Ch 1.1,1.2 [Stallings]
    Ch 3.1 [Stallings]
    Quiz-1
    Assignment-2 Deadline
    4- 5, 7/3/19 Top-Level View of Computer Function and Interconnection
    Instruction Execution Cycle
    Interrupts and Interrupt Handling Approaches (Disabled, Priority)
    Interconnection Structures (Address, Data, Control Busses)
    Remaining Lecture 2 Ch 3.2-3.4 [Stallings] Assignment-3 Deadline
    5- 12, 14/3/19 Instruction Set Architecture (ISA)
    Overview, What Constitute an ISA?
    Basic ISA Classes
    Instruction Set Definition
    Memory Organization
    Execution Model and Assesmbly Language
    Lecture 3 Must reading
    Ch 2.1-2.7 [Patterson & Hennesy]
    Quiz-3
    6- 19, 21/03/19 Instruction Set Architecture (ISA)
    Instruction Format: Register, Immediate, Jump
    Instruction Operations: Logical (AND, OR), Arithmetic (ADD, SUB), Control (Comparison)
    Remaining Lecture 3 Assignment-4 Deadline
    Quiz-2
    7- 25-29/03/19 Sessional - I Exam
    8- 02, 04/04/19 MIPS Review

    Processor Design - I
    Building Blocks: Register, Adder, ALU, Multiplexer, Register File, Program Memory, Data Memory, Bit Manipulation Components

    Single Cycle Processor Design: Overview, Datapath (For Arithmetic, Memory-Reference, Control Flow instructions), Identification of Control Signals
    Lecture 4

    Lecture 5
    Must reading
    Ch 4.1-4.3
    Appendix-B [Patterson & Hennesy]
    --
    9- 09, 11/04/19 Processor Design - II
    Identification of Control Signals, Controller Design

    Project Discussion: 4-bit Microprocessor Design
    Lecture 6

    Description (pdf)
    Must reading
    Ch 4.4
    Appendix-B [Patterson & Hennesy]
    --
    10- 16, 18/04/19 Processor Design - III
    Analysis of Single Cycle Processor Design, Introducing Sequence Controller Design
    Lecture 7 Must reading
    Ch 4.4
    Appendix-B [Patterson & Hennesy]
    Quiz-4
    11- Processor Design - IV
    Multi-cycle Design: Analysing Clock Periods in Single Cycle and Multi Cycle Design, Imroving Resourse Utilization, Adding Registers and Multiplexers

    Overview of Pieplining
    Lecture 8 Quiz-5
    12-
    Assignment-5 Deadline
    13- 06-10/05/19 Sessional - II Exam
    14- -- -- -- --
    15- -- -- -- Quiz-6
    16- -- -- -- --
    17- -- -- -- Quiz-7
    18- -- -- -- --
    19- 17-21/6/19 Final Exam

    Assignments

    Follow Design Procedure, Review example: BCD to Excess-3 Converter
    1. Assignment-1 -- (pdf) -- Evaluation
    2. Assignment-2 -- (pdf) -- Evaluation
    3. Assignment-3 -- (pdf)
    4. Assignment-4 -- (pdf)
    5. Assignment-5 -- (pdf) -- Deadline 28th April, 2019
    6. Assignment-6 --

    Quizzes

    Try to cover the course material everyday!! Surprise quizzes may be taken during the course.

    1. Quiz-1 -- Sol (pdf)
    2. Quiz-2 -- Sol (pdf)
    3. Quiz-3 -- Sol (pdf)
    4. Quiz-4 -- Sol (pdf)
    5. Quiz-5 --
    6. Quiz-6 --
    7. Quiz-7 --

    Exams


    Lab Related Material


    Projects


    Programming/Design Assignments


    Class Standings

    Class Attendance

    Attendance Sheet

    Class Grades

    In case of any issue related to marks, contact instructor immediately.